17 Jun
2011
17 Jun
'11
3:13 p.m.
From: ard at p850ug1.demon.co.uk
Hi
In most cases, it makes sense to try to show the demorganed symbol to match the designed
logical operation.
The only problem with that is that in some cases, it might be that one input doesn't
match the logical sense of the other inputs. Now that I've seen
this in real circuits and not someones RTL like diagram, I realize that I'd rather
just
see a nand gate look like a nand gate. I've found that I can't trust the
demorganed symbol
tell me what any upstream signal really has on that gate. I have to back trace it,
anyway, for all but the simplest circuits.
Dwight
On 17 Jun 2011 at 2:41, Dan Roganti wrote:
This is going to be a holy war...
I find the 'assertion logic' symbols -- things like AND gates with
inverting bubbles on both inputsn and outputs (representing, say, a
quarter of a 7432 OR gate) -- jar somwhat when I look at a schemaitc. But
I have no problems realising thar ORing a couple of active-low signals
preforms a logical AND of them.
In other words :
This
IORQ/-----o|\
| >o------- I/ORd/
Rd/------o|/
'32
means I have to think for a milliseond
This
IORQ/------)\
) >------- I/ORd/
Rd/-------)/
'32
doesn;t
-tony Positive Logic Design vs. Negative Logic Design
Most moderately complex designs contain a mixture of both. What irks
me when reading a schematic is the idiot who assumes that a 7400 is
ALWAYS represented as a quad NAND gate. This sort of thinking, while
being bush-league, also obfuscates the actual circuit design.