24 May
2017
24 May
'17
9:27 p.m.
On 05/24/2017 02:28 PM, Al Kossow via cctalk wrote:
Once you've built up a set of test vectors, it
actually becomes really
obvious where a single gate error is through simulation.
Does anyone collect the old Zycad hardware emulators? They were the
(very expensive) cat's whiskers at one time.
--Chuck