14 Jul
2015
14 Jul
'15
11:32 a.m.
On Jul 14, 2015, at 1:55 PM, Noel Chiappa <jnc at
mercury.lcs.mit.edu> wrote:
RISC. I/O processors. Multiple instructions in process at the same time. (Not
pipelining, that came a year or two later in the 7600). Interlocking machinery to handle
memory ordering (?stunt box?) and register access ordering (?scoreboard?). Very fast
memory cycling for its day. Extremely efficient context switching.
That?s a good start.
paul
From: Paul Koning
> I have a hard time coming up with other
machines with the same level
> of impact/influence, in terms of CPU internal architecture. Maybe
> Atlas, or the 801?
CDC 6600, of course.
I guess I don't know the 6600 that well (I have the book, and have skimmed it
in the past). What are the novel features in the 6600 that were widely
adopted by other machines? (I listed the Atlas because of paging, and the 801
because of RISC.)