On Nov 8, 2007 12:44 PM, Tony Duell <ard at p850ug1.demon.co.uk> wrote:
1 bit (ALU width for binary operations)
3 bits (Phyiscial width of user program RAM)
4 bits (ALU width for BCD operations)
6 bits (Logical width of user program RAM)
8 bits (physiical width of user data RAM)
16 bits (physical size of registers, ROM width, logical width of data RAM)
Does it have a separate ALU for binary and BCD operations, or does it
just ignore the upper 3 bits of the BCD ALU in each stage of a binary
operation? If so, I'd probably call it a 4 bitter.
The ALU is a pair of programmed 256 nybble ROMs. One of them handles
binary operations and the low bit of BCD operations, the other handles
the high 3 bits of BCD operations (that's a simplification, if you want
to see the scheamtics, grab 'my' scheamtics for the HP9810 from
hpmuseum.net and look at the data path board). There are a couple of
D-types hung off said ROMs for the binary and BCD carry flags.
Actually, since the programmer-accessible registers are almost all 16
bits long (A and B accumulaotrs, P program counter, etc) and since the
only thing that bothers about the fact that it's a bit-serial machine is
the microcode, it's normally classed as a 16 bit (albeit bit serial) machine.
-tony