cctech Digest, Vol 29, Issue 59

In the FA (Failure Analysis) lab at IBM, the "De-layering" process was complex, with different chemical and mechanical approaches or combinations, on different types of layers. Often, the objective was to find the actual site of a failure, and expose the layer or layers involved, to try to find the actual physical reason for the electrical or functional failure. Sometimes this got complex, such as removing a minute particle of contamination, and putting it thru a Mass Spectrometer to try to find out what the heck it was. They had "Signatures" for various contaminants, including, as I recall, cosmetics, human epithelial cells, dust mites, various fabric fibres, etc. Sometimes, they tried to keep the lower layers in working condition! Partially delayered chips were sometimes operated, in a vacuum, with a low-power scanning electron microscope as a probe. It was possible to extract waveforms, or scan multiple points to create a logic-analyzer type display. And the graphics were neat, with voltages from 0 to 5 volts displayed as shades of gray. As a test system designer, I thought this stuff was way cool, and I once proposed building a complete test system that included and drove the scanning electron microscope, and produced graphics displays in real time. I estimated only $500,000 (including the software!). It got shot down. 5 to 7 years later they spent over a million on a Siemens (I think) system that did pretty much the same thing. Oh well. Regards, Terry King ...On The Mediterranean in Carthage, Tunisia terry at terryking.us