Qbus split I&D?

On Wed, Mar 18, 2015 at 11:16:02AM -0400, Noel Chiappa wrote: Just to state the obvious: I assume the whole point of this "Unibus fence" concept is really for things that *aren't* memory. Mixing in some Unibus memory that's slower than PMI etc. and needs to use real addresses for DMA (vs. mapped ones) seems like a giant hassle for just 6.5% more RAM, so I figure it's really for bus windows or ROM boards or frame buffers or any oddball device that looks like memory and is too big to fit in the I/O page. (Even more obvious in case this is greek to anybody: the Unibus map acts as a RAM emulator for DMA accesses, passing those to real memory after remapping the addresses, and the "fence" optionally sets a Unibus address range in the low 248 KB where the map is disabled from doing that and steps aside to let any real Unibus devices at those addresses respond -- or not, so timeouts are still possible.) John Wilson D Bit