11 Aug
2015
11 Aug
'15
5:59 p.m.
On Aug 11, 2015, at 12:20 PM, Chuck Guzis <cclist
at sydex.com> wrote:
...
Every machine needs a fast memory system. CISC machines just as much, after all the
number of memory references per operation of a given kind doesn?t depend on the sort of
CPU architecture you use. All that changes is whether the cycles are issued by regular
machine code, or micro-engine actions.
A full-up 6600 is 32 way interleaved; half size you get 16 way interleaving. Once nice
benefit is that context switching takes only a few microseconds, because the exchange jump
would swap current and new context at memory speed: 16 words issued at 100 ns intervals
once the operation gets moving.
paul
I suspect part of the reason is that Algol wasn?t
all that popular in
the USA even if its heyday. Add to that the fact that most computer
designers weren?t all that skilled in software. And finally, as the
RISC experience has shown, it isn?t really worth it.
...
What RISC does demand is a fast memory system. The 6600 had 1 usec memory interleaved 10
ways, so it could issue a read or write every machine cycle (100 nsec). Without that, the
6600 could well have been a real dog.