16 Apr
2000
16 Apr
'00
6:17 p.m.
As it happens, the committee did standardize on the one
mode bit that makes
the interface an 8-bitter. How extensively that was adhered to remains to
be seen, I guess.
Well wishful thinking had me check it out using several 85-130mb drives
(quantum, Seagate, maxtor, WD) and none seem to do that. After all
having that would make the interface a no brainer and save a simple silo
for splitting read and writes. However, it was wishful thinking.
As to doing it on S100, been there done that. the interface logic needed
to do the bus does 3/4s of the work and it only needs a bit more the
close the loop. CPLD/FPGA/PAL could cover most of that but for S100
I like real TTL (244/241/373) like parts and NO cmos where the bis
interface occurs.
Allison