4 Aug
2008
4 Aug
'08
4:55 p.m.
Patrick Finnegan wrote:
I'll assume from that comment that you aren't
familiar with PDP-11
I understood the argument as "8086 put the 'vectors' (in quotes,
since
they are not just the addresses, but the opcode as well) at the top of
RAM, which did not solve anything., because in the next generation of
CPU, those addresses fell in the middle of the memory map. So, on the
one hand, you could constrain the memory map (ala PDP-11), which it
appears would be considered an "elegant" design, or we lift the top of
the address space, now exposing the 'vectors' as being in the middle of
the memory map, and that is considered "bad".
Dunno, given the choice between fixed map with MMU to push blocks of RAM
into view, or lifting the top of memory, I think the x86 designers
picked a wise path.
And, in case you're worried that hardware had to
be adjusted depending
on what address bus used, it didn't. The CPU asserts a I/O page line
on the bus whenever there's an access to the I/O page of address space,
So, the device only needs to check 12 address lines (memory accesses
are 16 bites wide) and the I/O page line, regardless of how wide the
address bus on the CPU is.
I noted the concern in general, but it does indeed appear the PDP-11
designers handled it with elegance. Still, I think we're comparing
apples to oranges. The Intel crowd had very little control over the
computer design, while the DEC team controlled all aspects of the
design, including the CPU. If the IBM team hadworked very closely with
the Intel designers in bringing out the 5150, I would agree with Tony's
point. But, we know IBM broke the rules in bringing out the unit,
pulling off the shelf and already available parts to bring the machine
to market. If they *had* collaborated as described, I fear the PC would
never have made it. I tend to believe it arrived because the folks who
designed it took the non-IBM approach, not in spite of that approach.