18 Jun
2011
18 Jun
'11
3:38 p.m.
On 2011 Jun 18, at 11:10 AM, Tony Duell wrote:
I have early calculators where flip-flops are built from a single
physical OR gate.
The output feeds back to one input so the gate will latch-up on itself.
The other inputs to the OR gate are SET inputs, sending one true will
latch true.
The gate is OC, so RESET inputs are created with simply diodes or
direct connections wire-ANDed to the output/loopback-input. Sending
such an input false will force the output false and it will latch in
that state.
So it's actually best described as a flip-flop built with an OR gate
and a diode-AND or wire-AND gate.
Another
example is the SR latch
These days you typically see the NAND gate SR latch.
Of course you van cross-couple 2 NOR gats to make an SR latch which has
activ-high set and reset inputs.
Something that's not often taught in introductory electronics courses
is
that if you apply De Morgan's law to one of the gates in a
cross-coupled
NAND SR latch, and then elimate unecessary inverters, you end up with a
cross-coupled AND and OR gate. This (a) is easy to understand in terms
of
'an AND gate can force a signal to be 0, an OR gate can force it to be
1)
nad (b) is useful if you have to fit an SR flip-flop into a pAL or GAL
and don't have CAD tools available.