Apple II hi-res and DRAM refresh (was RE: TRS-80 Model III)

--- Roger Merchberger <zmerch(a)30below.com> wrote: With my early experience having come from the Commodore world, I admit that the hi-res mapping on the Apple ][ struck me as odd, too; but when I programming professionally on it, our graphics guru whipped up a fast and simple row->address lookup routine and we didn't have to worry about it from an application standpoint. The "logic" is that the video refresh circuit doubles as a DRAM refresh counter. By decoupling the sequential nature of the CPU's view of the hi-res page and the video output circuit's view of the same memory, the timing lines up and results in a simpler refresh circuit (i.e., you don't have to refresh every byte in a DRAM chip, just every row, every so often; the mapping is driven by the bit geometry of the 4116 DRAM and how many columns there are per row). I forget how many chips Woz saved, but I think it was between 1 and 4. -ethan __________________________________________________ Do You Yahoo!? Yahoo! Finance - Get real-time stock quotes http://finance.yahoo.com