Sorcerer BASIC ROM-PAC ROM replacements

On 18/06/2011 23:00, Terry Stewart wrote: A 2716 is an equivalent for 2K x 8 bit mask ROMs in the sense that the capacity is the same, and the data and address lines are on the same pins. However the the chip selects need not be. One of the characteristics that can be "programmed" in the mask is the polarity of the chip select pins. Also an EPROM has pins for programming voltages as well as chip selects. No, you just need to deal with the chip select requirements. In this case, the pins that might differ are pins 19, 20, and 21. Pin 19 is A10 on most ROMs and EPROMs, but 12V on 3-rail 2716s. You're unlikely to come across those, so it's unlikely to be of concern. On mask ROMs, pin 20 is a chip select that can be active-high or active-low; on 3-rail 2716 EPROMs it's the A10 address line, and on single-rail 2716s, which are by far the most common, it's an active-low chip select. The Exidy mask ROMs have it as an active-low so it's the same as a common 2716. Pin 21 is most likely to be the problem. On a 3-rail 2716 it's -5V. More importantly, on mask ROMs it's a chip select that can be defined active-low, active-high, or "don't care", while on single-rail 2716s it's a programming voltage, and is set to +5V for reading. That's what your programmer is probably doing, but the mask ROMs you want to read use that pin as an active-low chip select. The solution is to carefully bend pin 21 out sideways a little, just enough that it doesn't go into the programmer socket. Then connect it to pin 12 (0V) with a short test clip. Set up like that, you should be able to read the ROM. Of course you need to make similar arrangements in reverse, if you put a 2716 (or 2732) EPROM into the ROM PAC. Specifically, if you replace one of the mask ROMs with a single-rail 2716 EPROM, look on the PAC's PCB for a set of small pads (jumper positions) with a number that matches the number beside the ROM socket. Looking at the PCB from the component side, with the card edge connector to the left, the sets of jumpers are labelled 1-4 left-right and are in the gap between the LSTTL chips anbd the ROM sockets. The ROMs are 2 (top left) and 4 (top right) and 1 (bottom left) and 3 (bottom right. The arrangement of jumper pads on the PCB matches the layout in the circuit diagram in the Tech Manual. You need to disconnect pin 21 from GND (0V) and jumper it to +5V -- but when you isolate 21 from 0V you will almost certainly also isolate pin 20, so you need to reconnect that to 0V with another jumper afterwards. Photo of one of mine at http://www.flickr.com/photos/pnt103/5848026101/ -- Pete Peter Turnbull Network Manager University of York