Whatever happened to "trans-puters" and "trans-networking" ?

It is veyry easy.. The T4 and T8 (at least) have a configurable memoery controller on-chip. For most applciations you just tie one of the pins on the Trnasputer ot one of the address/data lines to set it up. You have an on-chip refresh counter and you can set up the timing stobes to be essntially RAS/, addres smultplex, and CAS/ so linking up standed DRAM (4164s, 41256s) is easy. SRAM is easier still, of course. There is some on-chip RAM, but you nearly always need to add some external RAM. Yo ucan boot eitehr from one of the links (this is the normal method) or fro ma ROM in the transmputer's address space (I forget the start address, it's in the data sheet). Again selected by a pin on the transputer. The only mild problem is that you _must_ fit that 1uF capacitor to decouple the suppl to the clock PLL, and it must be a low-inductance component. Oh yes, addresses are 2's compliment, signed (!). This practical implication of this is that it makes a lot of sense to invert the MSB of the address bus, which then givs you what uou might expect... Teh T2 is the oddity in hardwar. It has a 16 bit data bus and IIRC 14 address lines on separate pins. The T4s and T8s have a 32 bit multiplexed addres/data bus. IIRC The T414, T425 and at least one of the T8s were pin compatible. If you built a bvoard with a T4 on it and decided you wanted a flation point devive, you could pul lthe T4, plug in a T8 and expect it to work. There wa astrange version of the T8 (T801? T805?) which was optimised for fast (at the time) static RAM. I've never designed with it, just seen it on a TRAM. The registrrs on those link adapters reminded me -- a lot -- of a DEC DL11 :-) -tony