5 Mar
2014
5 Mar
'14
6:28 a.m.
Many thanks to all for the enthusiastic responses to the feeler regarding Vince's RAM
kit!
Regarding comments on the design, Design Requirement #3 precludes SMT parts, so the FRAM
option is out. Actually, given the factors of its limited cycles and 10-year retention,
it's not clear whether that would be a better solution. Lithium coin cells are far
less prone to leaking than the cylindrical dry cells that are notorious for that. No
doubt, they could leak if abused but they are routinely designed for ten-year life span.
They have had enormous usage in PCs and I've never seen a problem with them. Lithium
coin cells don't worry me as much as some other components do.
Is there any evidence that slewrate is a problem for the Omnibus? I've been using the
RAM Board for about a year and a half now and have been all over the bus with wideband
scopes. No problems seen. The RAM has been absolutely solid and the computer has been
glitch-free. This topic is further addressed in the article.
Regarding technicalities of meeting Omnibus threshold specs, I didn't claim in the
article that it does so, only that I judged it to be close enough. Moreover, it's not
completely clear what the Omnibus specs are, as is covered in the article. The fact is,
the Omnibus swings good TTL levels and the chips used in this design have guaranteed TTL
input levels of 2.2V and 0.8V. That's about all I would expect from a nominal
threshold of 1.5V. So whether the target threshold is exactly that or not, I'm
satisfied that its a decent receiver for the Omnibus.
The idea that 1.6V on the bus is an acceptable logic-1, isn't right. If a heavily
loaded bus has (50) DEC5380 receivers, the expected current is about 4.5mA. That will have
negligible effect on DEC pullups #2, #3 and #4 [see article], since they source far more
current and are clamped at 3.5V. DEC pullup #1 will drop from 3.8V to 3.3V. So an Omnibus
computer with 1.6V high levels simply needs repair.
Thank you all for the stimulating discussion.
Steve Lafferty