I just powered up my unit and played with it for a moment to
reacquaint myself.
I'm still not clear what your unit is or is not doing.
Starting from scratch though, a possible debugging sequence:
- assuming the power supply is correct and clean,
- you did put pull-up resistors on the 1802 inputs such as nDMAOUT
and nINTR, didn't you?
- confirm the clock frequency is not too high for the 1802 chip type
being used
(not a good idea to measure at pins 1/39 as it may affect F).
Another possibility for debugging is to feed a low frequency clock
to the chip
or set up a single-step clock circuit.
- check the Examine mode.
The idea is each push of the INPUT switch should result in a
presentation of the memory contents.
Assuming the memory contents is somewhat random at this point, the
display should present random values.
Set the 3 mode switches for PROGRAM-EXAMINE.
Confirm:
1802-3 / nCLEAR =0V
1802-2 / nWAIT =0V
2101-20 / RAM-R/W =5V
1802-21 / nEF4 =5V, goes to 0V with INPUT switch depressed
Confirm the DMAIN cycle is working:
1802-31 / nDMAIN =5V, pulses to 0V with each push of INPUT
switch (will be difficult to observe at high clock F)
2101-18 / nMREAD pulses to 0V with each push of INPUT switch
display-latch pulses active (whichever is active for your
display type) with each push of INPUT switch
Observing the one time pulses may be difficult depending on what type
of scope / test equipment you have, one option is to turn off auto-
trigger on the scope and set the trigger slope and level to trigger
on the desired pulse edge.
I'm suggesting all this from just looking at the schematic and 1802
datasheet, errors are possible and sanity checks will be a good idea.
On 2012 Mar 9, at 5:29 AM, Gergely L?rincz wrote:
Brent, I checked the 1802 (both of them) and they seem
to work
fine. When
the CLEAR and WAIT pin are set high or low accordingly, TPA and TPB
sends
timing pulses (checked with the scope), the status pins SC1 and SC0
show
the state of the processor (checked it against the truth table, works
fine). I think they work fine. If you have any ideas how to test
the 1802s
further, let me know!
Greg
On 8 March 2012 08:23, Brent Hilpert <hilpert at cs.ubc.ca> wrote:
> On 2012 Mar 7, at 8:21 AM, Gergely L?rincz wrote:
>
> I finally had time to have a look at the schematics. I realised
> that this
>> schematics replaced the two 4050's with 4049s. Can you confirm
>> that it
>> works? Will purchase a couple of 4049 this week, wish I wasn't
>> under my
>> overdraft...
>>
>
> Inverting or non-inverting: it depends on other aspects of the
> implementation.
>
> Comparing with the schematic here:
>
http://incolor.inetnebr.com/**bill_r/elf/html/elf-1-35.htm<http://
>
incolor.inetnebr.com/bill_r/elf/html/elf-1-35.htm>
>
http://incolor.inetnebr.com/**bill_r/elf/html/elf-1-36.htm<http://
>
incolor.inetnebr.com/bill_r/elf/html/elf-1-36.htm>
> (There is an error on page 36: IC5 at the RUN switch is labelled
> as 4050
> (non-inverting and correct) but shown as an inverter.)
>
> If you are following the original design strictly it looks like there
> should be a 4049 and two 4050s.
>
> The implementation I happen to have uses three 4049s because:
> - simple LEDs are used for the display and so required inverters,
> - the display latch is inverted as it is a different latch type,
> - replaced the RUN-switch single-element non-inverting debounce
> circuit
> with a two-inverter circuit like the other debounce circuits.
>
> I mentioned my schematic because it shows things on one page and the
> control flow is clearer, I hope the implementation differences aren't
> confusing things too much.
>
> You mentioned checking a few things, but I don't think you
> actually told
> use what the problem symptoms are.
> Is the 1802 oscillator running?
> One suggestion would be to check that the levels at the mode
> inputs of the
> 1802 are correct for given switch settings.
>