19 Dec
2005
19 Dec
'05
8:18 a.m.
On 12/18/2005 at 10:37 PM William Maddox wrote:
I recall reading that the Cray-1 used balanced logic
circuits, in which
a complementary pair of a signal and its complement were always
generated, and each fed a terminated transmission line. The idea was
that the machine drew essentially constant current regardless of its
logic state. Perhaps this placed constraints on the chips that could be
used, as most MSI functions are not implemented in such a perfectly
symmetric fashion.
LVDS uses the same scheme of being differential throughout and even ECL
uses differential outputs (even if only one of them is actually brought out
to a pin). CML goes back to the 60's.
Cheers,
Chuck