Tom Watson wrote:
If you decide to make up a delay line to hold CPU
data, try a
prototype using shift registers. They are a bit easier to
make up, and often the chips are available. The problem is
that they come in weird (at times) sizes (132, 80, and the
like). I'll leave it to the reader to determine the
usability of odd sizes and their original use.
A lot of early MOS shift registers were developed specifically for use
in electronic calculators, as solid-state replacements for magnetic core
memory or magnetostrictive delay lines. Since most all electronic
calculators in the mid-'60's through the late 70's operated in BCD or
some alternate four (or sometimes five)-bit representation of decimal
digits, the shift registers were usually made with a number of stages
that was a multiple of four or five, with a few extra bits here and
there for timing and synchronization. That's why many of these devices
as an unusual number of stages. In some calculators from the late
'60's, as IC logic had pretty much replaced discrete transistor designs,
there were different versions of the same machine, earlier machines
which used a magnetostrictive delay line, and "updated" versions which
dispensed with the delay line, and replaced it with a number of MOS IC
shift register devices. Functionally, the machines were identical. As
far as the digital logic section of the machine went, also identical.
The only real changes were the removal of the read amplifier and write
driver for the delay line, and replacement with some simple
level-shifting and power supply circuitry to properly drive the shift
register chain.
Rick Bensene
The Old Calculator Museum
http://oldcalculatormuseum.com