8 Nov
2007
8 Nov
'07
7:20 p.m.
On Nov 8, 2007 12:44 PM, Tony Duell <ard at p850ug1.demon.co.uk> wrote:
1 bit (ALU width for binary operations)
3 bits (Phyiscial width of user program RAM)
4 bits (ALU width for BCD operations)
6 bits (Logical width of user program RAM)
8 bits (physiical width of user data RAM)
16 bits (physical size of registers, ROM width, logical width of data RAM)
Does it have a separate ALU for binary and BCD operations, or does it
just ignore the upper 3 bits of the BCD ALU in each stage of a binary
operation? If so, I'd probably call it a 4 bitter.