Chuck Guzis wrote:
Certainly, any interest in floppies has to be marginal
by now.
Well, I wish you'd told me that before I started building the disc analyser :)
FWIW, I'm getting perilously close to building a prototype -- the FPGAs are
here, and I've got >90% of the other parts, including those for the homebrew
Byteblaster II cable (which I put together this morning). I'm short a 50MHz
3.3V CMOS oscillator, but that's an easy problem to solve (relatively speaking).
Analyser-wise, I've just got the write controller state machine to pass the
testbench in Quartus -- it's spitting out a few dire warnings and the data
separator / sync word detector needs a few bugs killing. But of course there's
only so much the design software can tell you... I think it's got a good
chance of working on its first test run. I'm hoping that PC66 SDRAM timing
isn't critical enough that I need to start doing trace-length matching...
--
Phil.
classiccmp at philpem.me.uk
http://www.philpem.me.uk/