21 Jul
2003
21 Jul
'03
1:11 p.m.
jpdavis sez...
Robert Krten wrote:
This was not in-circuit, this was in a test jig. I don't know what the
in-circuit fanout would have been, that would require massive amounts
of digging through the schematics :-)
Cheers,
-RK
--
Robert Krten, PARSE Software Devices +1 613 599 8316.
Realtime Systems Architecture, Consulting and Training at www.parse.com
Looking for Digital Equipment Corp. PDP-1 through PDP-15 minicomputers!
<snip>
:-)
In my case, the failure modes were as follows:
2 chips failed with: grounding the PRESET line caused the Q
to go high as expected, but when PRESET was left floating Q
went low. [DEC leaves the PRESET and CLEAR lines floating on
various modules, so I consider this a fair test].
1 chip failed with insufficient +5 on the Q (or bar-Q, forget
right at this instant) output. The measured output was something
like 1.6V.
<snip>
That sounds like a design flaw. Even with TTL, unused inputs should be
tied to somthing.
What was the fanout for the Q /Q on the fried output?