30 Jul
2014
30 Jul
'14
9:45 a.m.
On Tue, Jul 29, 2014 at 09:13:42AM -0700, Chuck Guzis wrote:
[...]
Which brings up an interesting question--how many
other machines shrunk their
instruction set during the course of evolution, rather than the other way
around?
Reasonably interesting CPUs effectively have two instruction sets: user
instructions in which applications are implemented, and system/supervisor
instructions for use by the operating system. The latter are more malleable
than the former, since the operating system is expected to be upgraded to take
the different functionality into account.
As an example of changes to the OS functionality, the 68030's MMU offered a
wide range of page table sizes, but in the 68040 this was reduced to just two,
with corresponding changes to the supervisor instruction set.
When Freescale evolved the 680x0 line with their "Coldfire" series of CPUs,
they also removed a whole swathe of instructions and addressing modes such as
DBcc and BCD instructions.
At one point in ARM's evolution, they added a new operating mode called Jazelle
which could execute the simpler JVM instructions and would trap for
hard-to-implement instructions. Contemporary ARM chips have stub support which
trap on *all* instructions.
When x86 was extended to 64 bits, segmentation support was gutted (yay!) and
remain as just a pair of extra base registers, typically used to locate
thread-local storage.