The output from the failure case shows that the memories passed their
onboard selftest and moved on to the CPU/Memory Interaction tests.
If I decoded the LED's correctly the failure codes correspond to
T0008 Write Buffer Switch and Purge Test
T0013 Hit on Disabled Tag Store Test
That doesn't ring any bells for me.
Try just a single CPU, the suspect memory board, and the 2 DWMBA/A's on
the bus. If it fails, move the memory board to a different slot (a bad
slot will cause hangs). If it still fails, then you have a bad board
(I'd guess a broken XMI interface given the test failures above).
BTW, the only XMI config rules I remember are:
1. CPU start in the lowest numbered slot and go up.
2. DWMBA/A's go in the highest numbered slot and go down (must be one
installed).
3. Memory can go anywhere in between.
re: DEBNI
The DEBNI probably supports MOP boot (the DECnet boot protocol) and MOP
console in firmware. There were just a few register bits that needed to
be set to trigger a boot (assuming you could find MOP server code around
somewhere). That was definitely true of the DEBNA.
I vaguely recall that someone at CMU might have done a DEBNI driver for
Mach (not for the VAX, but for the DECsystem 5800, which used the same
I/O gear). But, they might never have had permission to release it.
/gary