Had a look over the schematic CrossRef with the msx tech manual and looks
ok, U21B.5 i have connected to the PPICS* signal though,
question: do we need the "board select" switches/682's ? is the board in
reality more likely to just have straight address decoding via U33 to the
PPI, Printer, UART? and the addresses fed straight to the various ROM, RAM,
and I/O ? the only brains of the operation is the PPI which selects which
chip select lines to get enabled at which addresses of 16KB blocks?
the VDP and Sound board however will need the address decoding as we dont
want to route out U33 pin(s) 11 and 12 to the PSG and VDP respectively.
http://img855.imageshack.us/img855/5489/do2b.jpg
[URL=http://imageshack.us/photo/my-images/855/do2b.jpg/][IMG]http://img855.imageshack.us/img855/5489/do2b.jpg[/IMG][/URL]
looking forward to this board!!
On Monday, 5 August 2013 10:31:49 UTC+12, lynchaj wrote:
Hi
As you may already know, at the N8VEM project we are working on an S-100
VDP. This board has a V9939 video display processor and a AY-3-8910 sound
generator which should allow us to have some MSX2 compatibility when
combined with a backplane, S-100 Z80 CPU board, and a memory board.
There are more IO and memory features necessary for full MSX2
compatibility required though. I am considering a designing a board to
provide the balance of MSX2 functions so that the combination of an S-100
backplane, S-100 Z80 CPU, and S-100 VDP.
I envision such a board to be composed of SRAM memory, a couple of 8255
PPIs, a card slot plus whatever extra IO and memory we need. If anyone
has detailed MSX2 experience and would like to help out on designing an
S-100 MSX2 compatibility board to complement the S-100 VDP please contact
me.
S-100 and MSX seem like a neat combination but no one has tried it AFAIK.
Thanks and have a nice day!
Andrew Lynch