On 8/27/2014 8:20 AM, William Donzelli wrote:
At a previous
employer where we were doing *bringup* of new processors on
new hardware (Intel Core2 stuff...before the memory controller was integrated
in with the CPU) we had a "front side bus analyzer". It was "double
pumped"
and running at 800MHz (so logically it's running at 1.6GHz). As I recall that
analyzer was in the high $100,000s (ie pushing $1,000,000).
And in 20 years, that
same item will be a $100 hamfest special.
--
Will
Intel used the Deathstar, which was a semicircle of HP 16700 frames
loaded with 4m deep capable cards. I don't know how many channels they
had, but I know they instrumented the FSB and graphics.
This was in the time of the Timna, which was to be a single SOC with
graphics just after the P3 Coppermine turn.
The Coppermine was about the last S1 form factor product before they
transitioned back into the original pin type packaging away from BGA's
on circuit boards for reference.
The Timna was killed off, not sure why.
The 16700's are already sometimes in the $100 range with the newer logic
analyzers out in the field now.
We at Arium had a trace product up to the S2 and S1 days which used an
Arium ML4400 analyzer with special cards built by another company to
capture the bus traffic. That was the last trace product for Intel that
we did. We transitioned to run control only like everyone else and left
the tracing to others.
I think the monster that HP made for the Itanium was the last trace they
did for intel. There is a preprocessor module that shows up on the
market w/o the adapter to go under the processor all the time. Useless
w/o the adapter, but people look at the original cost from HP for it and
price the things at ridiculous amounts. They are almost always for sale
from "asset recovery" operations and they
base their attempted sale on a
percentage of the original balance sheet value. HP
made so few of these
that they were just incredibly expensive.
We at Arium did the run control for Itanium for HP and interacted with
their logic analyzers to do triggering and also could read the trace
into our debugger for annotated instruction level trace.
Jim