Homebuilt relay computer

Chuck Guzis wrote: How about: - use regular relays as you suggest, n+1 relays per word, n relays are 'bit relays', the (n+1)'th relay is a 'clear relay'. - a contact of each of the n bit relays is wired to latch the relay. - a normally-closed contact on the clear relay of each word supplies power to the latch contact for the n bit relays. A write cycle for the word consists of the sequence: 1. pulse the clear relay for the word (opens the latch circuit, bit relays are released) 2. 'gate' the data bus onto the coils of the bit relays, the relays for bits="1" pull in and latch up. ... kind of like the write cycle for core memory where you have to set all bits to the same state before changing some to the other state. You get by with one relay per bit but have fixed overhead for each word. A large word size may be advantageous to reduce the ratio of fixed overhead per word. I did a (small) design/experiment with some relays a while ago as a part of a project. It was fun stuff, developing/wrapping-your-head-around some different design principles regarding timing issues, economics (number of contacts available), etc. The fellow's relay computer looks really neat (Ohh.. to have 400 relays). It may be the only Von Neumann architecture relay computer to have been made (or relay CPU to be more accurate, given the IC memory) (I'm presuming it's a basic VN arch). (Although I think there was a fellow by the name of Booth in England that experimented with making an inexpensive machine, late 40s or early 50s, after the stored program concept was developed. I don't remember the details, but it may have used relays. I think it's mentioned in "Early British Computers"/ Simon Lavington/1980/Digital Press/DEC.)