8 Feb
2003
8 Feb
'03
6:30 a.m.
On Sat, 8 Feb 2003, Eric Smith wrote:
Pete wrote:
6 according to my chart.
You must be thinking of some different 6502 to
the rest of us :-) As
Sellam said, no 6502 opcode takes less than two clock cycles to
execute, and most take more (up to 7): the only 2-cycle instructions are
the ones with implied addressing, like RTS, CLI, TAX, ...
Not RTS, that takes a bunch. I've spent some time working on a reimplementation
of the 6502 in a
Xilinx FPGA. It's actually fairly difficult to design to match the
exact number of clock cycles for each instruction. It's much easier
if you allow instructions to take more cycles, which is the approach
taken by the OpenCores version. That still lets you run it much faster
than the real thing, but is no good for things that depend on the
exact cycles counts, such as the Apple II RWTS routines (low-level
disk access).
Yes, that could really mess up some timing-critical code.
Sellam Ismail Vintage Computer Festival
------------------------------------------------------------------------------
International Man of Intrigue and Danger http://www.vintage.org
* Old computing resources for business and academia at www.VintageTech.com *