11 Jun
2013
11 Jun
'13
11:46 a.m.
On 06/08/2013 08:08 PM, Guy Sotomayor wrote:
I found this a while ago. I just think it's so
cool to implement a Forth CPU
in 200 lines of Verilog. A complete system including a TCP/IP stack fits
in 8K bytes!
Here's the link: http://excamera.com/sphinx/fpga-j1.html
That's very cool indeed. I've gotta do something with that.
-Dave
--
Dave McGuire, AK4HZ
New Kensington, PA