18 Jan
2012
18 Jan
'12
11:19 a.m.
On 1/17/2012 1:34 PM, Tony Duell wrote:
I assume in this case the row and column lines are connected to a PIA or
similar chip so that they can either be inputs or outputs. The CoCo is
similar.
Most other machines enforce in the hardware whether the rows or columns
are the 'driven' lines, which means you can use a dual-ported RAM, or
digital logic to simulate the keyboard
No, given a dual-ported RAM, this works. It's
fine for a 8*8 matrix (as
in the case of the TRS-80). it's less fine for a 16*8 matrix, when you
needa 64K dual-ported RAM and have to update 32768 locations (i.e.
half of them) for every key change-of-state.
Given the original topic, a dual
port RAM is indeed feasible. However,
for keyboards that can be scanned either way (CBM VIC-20, C64, C128,
C128D, +4), dual port will not work, as one cannot guarantee that the
rows are the "addresses" and the columns are the "data" or vice
versa. For reference, the CBM PET has a 3-8 decoder used to
select rows in the
KB matrix, so a dual port ram option can work (because the design can
guarantee the address and data usage)
There is a MT8816, which is an 8x16 matrix.
Right.
As Tony notes, KB matrix diodes would make things more complicated, if
not impossible.
I don't think you can simulate such a keybaord usign an analogue
crosspoint IC. On the otehr hamd, the existance of such diodes pretty
much enforces which lines are inputs and which are outputs, so yuu could
then use the dual-ported RAM solution.
-tony