Sometimes the data sheets for an SARM (or whatever)
indicate the
row/column structure. Not that it matters, I've not come across an SRAM
that has, say, faster access time from a change in row address than a
change in column address
When I once asked why there were so many different PDP-11 memory diagnostics,
(beyond just unmapped vs mapped vs whatever processor diffs) I was
told that it was because each was structured to hit the row/column drivers
and induce known pattern-sensitive failure modes particular to the
core stack or chips in use.
Tim.