21 May
2007
21 May
'07
4:27 p.m.
On 21/05/2007 09:42, Johnny Billquist wrote:
Wire-wise, yes. Protocol wise the manuals imply that some signals don't
behave the same, even though they are named the same.
Only (as far as I can see) in the way PMI moderates things in any system.
Didn't someone say a few days ago that they had an 11/84 with the boards
in a different order? As far as I can see from the schematics, that
would work fine, and I think the conventional order shown in the manuals
(processor in slot 1, then memory) is just because, well, they had to
standardise on something, and that's a logical easy-to-remember
convention. That's not the case in an 11/83 where the memory *has* to
go above the processor because the backplane's C/D sections alone are
not a true bus, and the KDJ11-B only has the PMI connections on its top
side. In the 11/84 backplane the C/D sections are a true bus, so from
that point of view, the order doesn't matter.
Mmm. Could be. Anyone got one? Or better still, a manual?
--
Pete Peter Turnbull
Network Manager
University of York
Pete Turnbull <pete at dunnington.plus.com>
skrev:
> >
Correct. So if people could stop assuming that an 11/84 have a
q-bus, we
>
would get a long way towards clearing this up.
Except that it does have a (short) QBus :-) OK, we're
agreed that the standard config for an 11/83 puts the memeory
before the processor, and the standard config for an 11/84 puts the
memory after the processor :-)
Yes. That we agree on, and that is probably the most important piece. The P-series
11/84 which I've found described in one of the later 11/84
manuals used an MSV11-R, which is a normal QBus memory, not PMI.
Well, according to the field guide, that *is* PMI memory. :-) But not
ECC memory like the MSV11-J.