27 Jan
2006
27 Jan
'06
6:30 p.m.
what about asics, fplds, fpgar, vlsis (the latter
being of most interest to me), etc. etc. etc. Can
those be readily reverse engineered. Say you had a
*bad* vlsi, and a block diagram of its innards. Could
the *details* be worked out, and would it be feasible
to reproduce it as an fpga?
--- cctech-bounces at classiccmp.org
<ard at p850ug1.demon.co.uk> wrote:
front door.
> (and contents) when it was removed from the
circuit. Or else redisign and
> use a PAL or some form or programmable logic that
has a security fuse to
prevent it
from being read.
Oh come on. PALs are about as secure as a cardboard
If you're going to allow unpackaging the chip, then
remember that PAls
used the old fusible-link technology. And those
links will be in the top
metalisation layer. You could see which ones were
intact and which were
blown with a microscope. And I guess if you could
open up a new example
of the same make and type of PAL without damaging
it, you could blow the
links one at a time and keep on looking at the chip
to work out which was
which.
But why go to all that trouble? Even if the security
fuse is blown, it's
possible to reverse-engineer a PAL using well-known
techniques of
applying various inputs and looking at the outputs.
With a PAL there is
no way to have a hidden variable. Any flip-flop in
the chip (wether part
of thr 'R' of a registered PAL, or made from
the
AND/OR matrix) will
appear on one of the pins (this is not true of GALs,
unfortunately). So
with a PAL it's relatively easy to work out
what's
going on.
-tony
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