On Wed, 2004-01-14 at 16:27, Tony Duell wrote:
> OK, using a 1 million gate FPGA to replace a 7400
is
> overkill, but it would work
Not if the FPGA isn't 5v tolerant.
I am quie sure the problem of level-shifting between TTL levels and
whatever's common in 50 years time will be solved by then :-). 50-year-on
parts will be so much faster than good old TTL that the extra delay
caused by the level shifters won't be a problem either.
Not to argue with you, but it's likely to be very analogous to right
now, say interfacing 3.3V FPGA junk to old CCSL or DTL. Schematically
easy, and a bunch of fabrication and installation hurdles, nothing
fatal. (The speed difference today is likely as you guess for .5C from
now.)
But it's not even unlikely that half a century from now our clean and
neat binary logic hardware will be as robust and orthogonal-seeming as
electron tube logic does today. In fact, I think this is just as or more
likely than the former scenario.