CLASSICCMP(a)trailing-edge.com wrote:
--snip--
Welcome to the world of S-100, where DRAM boards often didn't
support DMA controllers properly. In some cases, you can rejumper
them so that the DMA vs refresh timing conflict isn't such a problem.
But many of us just went to pure static RAM systems where DMA
was being done.
What disk controller are you using, BTW? In some cases the problem
isn't so much the memory, but it's the disk controller.
Hi
It is an old descrete TTL controller by Digital Sytems. It
has a seperate bus interface card labled "HB-1". The controller
in the disk drive box is a "FDC-1". I have schematics for both,
so I may be able to do something. I may just have to continue
with the statics but these boards are quite old and I've
already had to replace one 74LS32 on one of the boards. Maybe
I should write a more intense RAM test and run them through
their paces. I don't think I'd want to wait for GALPAT but
a simple March C seems to be in order.
Dwight