I pulled this off of the web by googling. no way to verify it.
this was the website, for credit's sake
http://neil.franklin.ch/Usenet/alt.folklore.computers/19971216_HCF
... It was the 6800 that had such an instruction. It
was a variant of the 'JMP' (jump) instruction that "jumped to the
accumulator". The opcodes are 0x4E and 0x5E (for the A and B registers
respectively). While not used in "normal" operations, they are convient
for bringing up new designs. One could wire the data buss to either of
the codes, and reset the processor. Upon reset, the processor reads out
locations 0xFFFE and 0xFFFF for the location of the first instruction to
execute (it gets 0x4E 0x4E), then it sets the address buss to that
location and reads an instruction from there, getting 0x4E. This causes
the address buss to increment and cycle thru, reading every location on
the buss. With a scope, properly attached, quite helpful. Shows up
decodes and the like for the various I/O, RAM, ROM devices. Might even
show up conflicts, or a mal formed decode PAL.