IBM 5150 maximum memory?

Well, they had to put some ROM at the top of the address space because an 8088 starts executing at FFFF:0000 after a reset. That IMHO is another Intel Misfeature, which goes as follows : The 8080 (and for that matter the Z80) starts esecuting at location 0 on a reset. Therefore, the origianl Intellec 8080 development system, with a lights-and-switches panel had _RAM_ at location 0. You wrote a jump instruciton at locaition 0 pointing to your code (or the monitor ROM), then reset the processor and gave it the bus. It executed the jump, and thus the desired progam Therefore CP/M was designed to have RAM at location 0, since it was origianlly developed on Intel development machines On later CP/M machines, without a front panel, it was necessary to RAM at location 0, and thuse a little ROM/logic that provided the power-on jump to a ROM at the top of the address space after a reset. So far, so good. The Intel mesifeature was making the 8088 and 8086 start at a location near the top of the memory map after a reset as as attempt to get round this 'problem' not realising that _any_ fixed reset location would have essentially the same effect. And to make the 80286 (and later) processors start at the same location as the 8085, and thus somewhere in the middle of their much larger address space was plain insane. -tony