30 Aug
2016
30 Aug
'16
11:14 a.m.
On Aug 30, 2016, at 1:02 PM, Mattis Lind
<mattislind at gmail.com> wrote:
Yes, indeed. And the key item is shown on the daughtercard connector description: it has
address lines 0..8, so 9 address bits, times 2 since DRAM has row and column addresses,
that makes 256 k words. What's different compared to the 380 is that there
doesn't appear to be a signal that says which chip size is present, unless it's
that "reserved" pin 39. The Pro 30 has pin 43, P256KD L, in other words,
"this pin is connected to ground if the card has 256k chips on it".
I wonder if those memory chips are still available. Alternatively, I suppose one could
emulate the whole daughtercard (the DRAM protocol and the memory too) in an FPGA. :-)
paul
...
You're talking about the Pro-380 daughtercard, right? It has a jumper on
the card to indicate to the software whether the card has 64k or 256k
chips. I don't see anything like that in the Pro-350 description.
No. Actually the 350. I still have the machine, though it hasn't been ran
for ages. I did this "upgrade" more than 25 years ago so the (my...) memory
is a bit fuzzy. But I think I remember that it was just a simple change of
chips. No extra wiring needed to handle the extra address bit, it was all
there.
I just looked up the tech manual page 5-46: "The system can address up to
512kbytes per daughter board slot" so my memory wasn't that bad after all.