6 Feb
2019
6 Feb
'19
6:29 p.m.
On 02/06/2019 04:24 PM, Brent Hilpert via cctalk wrote:
On 2019-Feb-06, at 1:21 PM, Noel Chiappa via cctalk
wrote:
Is the schematic available for the memory board at-issue?
Curious myself to see what approach for refresh DEC used.
Hmm, yes, if the refresh is done by one-shots and RC timing,
a failed cap could silently kill the refresh trigger. An
easy way to check is put something in a few locations and
halt the CPU for some time (seconds to minutes). If the
content is now gone, then the refresh is very likely not
being done.
Jon
From:
Brent Hilpert
what about the refresh circuitry of the memory board?
...
It might also explain why a number of 4116s were (apparently) failing
earlier in the efforts ... replacing them might have just replaced them
with 'slightly better' chips, i.e. with a slightly longer refresh tolerance.
Ooh, excellent idea!