More Bringing up a CPM

<correctly. Hence, DRAMs before '83-84 were somewhat iffy on the S-100. B <then, of course, the S-100 was, more or less, history. One of the things There were a few that worked really well but one look at the design said why, good designs work. One of the worst ones used gate delays for the ras-muc-cas timing... <may be, but DRAMs are not as difficult or fussy as a lot of people have <said. I've designed literally dozens of different DRAM circuits which in The ones that work were near unbreakable, there wer a few notables by 1980 and by 82 a swamp of them. <DMA was popular for early FDC's in the mid '70's because 8080 processors <were too slow to get around the loop fast enough to transfer data from Not true for S100 systems. DMA was hardware intensive and the 8257 was too expensive and too difficult to use with the rather helter skelter signals. The 8080 would do SD 8" no problem and DD5.25 with not much difficulty but the programming tricks were basically ugly. CP/M only moved 128 bytes at a time, so moving multiple sectors was wasted for the most part unless you were caching. In the multibus and STD bus worlds things were quite a bit saner. Allison