30 Mar
2022
30 Mar
'22
11:16 p.m.
-----Original Message-----
From: cctalk <cctalk-bounces at classiccmp.org> On Behalf Of Tony Duell via
cctalk
Sent: 31 March 2022 04:26
To: Noel Chiappa <jnc at mercury.lcs.mit.edu>; General Discussion: On-Topic
and Off-Topic Posts <cctalk at classiccmp.org>
Subject: Re: PDP 11/24 - A Step Backwards
On Thu, Mar 31, 2022 at 3:52 AM Noel Chiappa via cctalk
<cctalk at classiccmp.org> wrote:
Yes I found that on the schematic and surmise that this is what has failed.
If the machine then runs, it's up to you as
to whether you get the P/S
repaired so that ACLO work properly - your call. (I wonder how the
-15V got to ACLO - I suspect a solder bridge from the prior repair -
but knowing the answer is not important to getting the machine
running.)
A short in FET Q15 on the bias/interface board in the PSU could do it.
The gate of that FET is driven from an LM339 comparator the -ve supply of
which is -15V.
Of course _why_ Q15 failed, if it has, is another
matter.
Yes, a bit concerning, and as Noel says maybe this has damaged something else, or that
something else on the CPU caused Q15 to fail (if indeed it did). Perhaps I should follow
Noel Chiappa's suggestion and disconnect ACLO, DCLO and LTC, they are all on the same
connector and see how far it gets. If that works then I think repair ACLO and see if
anything on the CPU is bad or anything else that might cause a short on the ACLO signal of
the bus.
-tony