[HP41]
I couldn't have described the ports any better
myself. :-)
I reckon I could :-)
12 connections --
3 power : Vbatt (battery +ve), Vcc (logic supply), ground
3 timing/sync : Phi_1, Phi_2 (2 phase clock), sync (bus cycle synchonisation)
ISA (Instruction and address -- 16 bit serial machine code address and 10
bit serial machine code instruction)
Data (56 bit serial data line)
2 slot selects (B3, B4, either floating or tied to a power line (I
forget which one) in the 4 possible combinations, so a module can tell which
slot it's plugged into)
PWO (Power off, turns off devices to save battery power)
FI (Serial flag input line)
A bus cycle is 56 clocks, corresponding to the 56 bits of a machine
register. Data (user program code, numbers, etc) is transfered serially
over the data line. Early on in a bus cycle, a 16 bit machine code
address is output on the ISA late, later on, a 10 bit instruction is read
back from the ROM [1] over the same line. Sync is asserted during those
10 clocks _unless it's fetching the second word of a 2 word instruction_ [2].
Note there's no read/write line, etc. The RAM chips have to decode the
instruction on the ISA line and start accepting data from the Data line
if it's a write instruction.
[1] Note that a machine code instruction can't be read from normal HP41
RAM, which can only output data onto the data line. If you want to do
machine code programming, you need some non-HP add-ons such as a special
RAM box that emulates a ROM
[2] this is actually a sensible idea. It means that a RAM chip, etc, only
decodes instructions when the sync line is asserted (to determine if it
should start reading or writing) and can't be fooled by the second word
of a 2-byte instruction (IIRC those are jumps, they never involve any
device other than the CPU).
Modules use the B3 and B4 lines to determine which port they are plugged
into. RAM modules (HP41C only, the maximum user RAM is built into CV and
CX machines) must be plugged in starting at port 1 unless you are doing
something _very_ strange. ROM modules are mapped to addresses 8xxx/9xxx
(port 1), Axxx/Bxxx (port 2), Cxxx/Dxxx (port 3) and Exxx/Fxxx (Port 4).
Most 4K ROM modules use the lower of the 2 pages assinged to a port, but
there's no reason why this has to be the case. Note that the card reader
ignores these lines, it can only really be plugged into port 4, and the
ROM always appears in page Exxx. Extended memory modules (-CX and others
with an extended functions ROM plugged in) use on of these lines so you
can have 2 such modules plugged in at the same time.
Can you tell I still use an HP41, I have been known to program it in
machine code :-)
-tony