On 2015-Jun-16, at 3:35 PM, Dave G4UGM wrote:
-----Original
Message-----
From: cctalk [mailto:cctalk-bounces at
classiccmp.org] On Behalf Of tony
duell
.. its
also a nasty hybrid design with DC biased NPN and PNP
transistors. I find it ugly and can see it being a pig to debug,
though it simulates fine in LTspice...
I didn't find it that hard to basically understand in my head. After all,
there
are only 4 transistors, and 2 of those are just
an output buffer. Quite
why
having both NPN and PNP transistors makes it
harder to understand I do not
know.
I am really used to RF circuits so am puzzled there is no inductor. It kind
of looks like a Darlington Pair but it isn't.
What I don't understand is why the emitter of Q1 is spliced in what I assume
is a voltage divider in the collector of q2.
I was expecting a multivibrator circuit...
I think you could characterise it as:
- Q1 & Q2 form a two-stage direct-coupled non-inverting amplifier from Q1-B to Q2-C.
- C5, the main timing cap, is thus effectively in AC positive feedback, as one would
expect for an oscillator.
- R9 (the R between Q2-C and Q1-E you were questioning) provides DC negative feedback,
presumably to help stabilise and fix the circuit characteristics, as some measure of
stability is going to be
needed for a baud-rate generator. Note it also has it's own voltage regulator in D1
to D4.
At first glance I thought R9 might be there to provide some hysteresis in the switching
thresholds for the RC charge/discharge but it looks like it acts in the opposite direction
to that.
The base circuit of Q3 (the first stage of buffering) will draw current from the
high-impedance side (R8,R9) of the oscillator output, pulling up the C5,R9 junction when
Q2 is off, so it will probably affect the oscillator and be necessary to get the
'proper' functioning of the oscillator portion of the circuit.