12 Jun
2010
12 Jun
'10
10:41 p.m.
On 06/12/2010 07:03 PM, Keith wrote:
I got an extra "not" in there. The absence of a pulse has an effective
phase error of zero; it doesn't cause any adjustment to the PLL.
So then how big would my window be? 2us?
For adjusting the PLL, you can interpret the window as zero-length. The
leading edge of the pulse is always either before or after the window by
some length. However, you're doing some sort of time quantization, so
there will be some point at which you can't tell which, so you consider
the error to be zero.
The pulse produced by most drives are around
250-350ns.
The pulse width doesn't tell you anything. Only the leading edge of the
pulse is significant. The drive electronics has a one-shot that
generates the pulse when it sees a flux transition.
When you say at each iteration, do you mean each
received pulse?
No. The PLL is free-running. There is a pulse window every 2 us (or
whatever), so the PLL period is going to be approximately 2 us.
(Note that
the absence of a pulse is not considered to have a phase
error of zero.)
I really have to do more reading on this.
If my period is already adjusted for the phase error, and added to the
phase counter, why are we now modifying the phase counter again with
phase error? We modify the long term period (frequency) AND make sure
that the current cycle gets the adjustment too?
To better track ISV. However,
setting beta to zero may be reasonable.
Eric