15 Dec
2018
15 Dec
'18
5:42 p.m.
On Sat, Dec 15, 2018 at 11:55 AM Chuck Guzis via cctalk <
cctalk at classiccmp.org> wrote:
On 12/15/18 10:01 AM, Guy Sotomayor Jr via cctalk
wrote:
FRAM requires write-after-read refresh, but it's done internally to the
part. That's why FRAM has limited read endurance; each read also does a
write. FRAM endurance is typically 10^14 cycles (check the datasheet of a
specific part), which is adequate for most uses.
FRAM or MRAM. I make extensive use of them in my
projects.
Everspin has a few (all SMT and 3.3v). As I recall they run ~$20/ea for
4Mb (512K
x 8 or 256K x 16).
As neither MRAM nor FRAM requires a write-after-read refresh, I fail to
see the "realism" in this that couldn't be satisfied with simple
battery-backed RAM or even flash-backed RAM.