13 Oct
2007
13 Oct
'07
6:11 p.m.
"Ethan Dicks" <ethan.dicks at gmail.com> wrote:
On 10/13/07, Roy J. Tellason <rtellason at
verizon.net> wrote:
NMOS is good at pulling down. This works well with TTL with a
pullup resistor, because TTL traditionally is a "pull down" logic
family. The NMOS output pins are not by any means beefy - usually
they only are good for driving a single TTL or two inputs, and only
with the right pullups.
Some NMOS chips used on-chip pullups (I think actually weak PMOS
FETS on the chip but I was NEVER a VLSI guy.)
PMOS is good at pulling up. This is not a natural match to TTL.
NMOS is only compatible if the supplies are structured to be similar
to the TTL levels. PMOS often used voltages that were rather bizarre
compared to the TTL designer's view of 0 and +5V, because there was
almost always some extra interface glue between the two.
For fun, abandon gates and instead build stuff out of CD4007's.
The datasheets and part number might make you think it's a logic
chip, but in real life it's some NMOS/PMOS pairs with a good amount
of the internal connections available. Lotsa fun as an analog device!
And now that the CA3046 is discontinued I may as well learn how to
use FET's :-).
Tim.
On Saturday 13 October 2007 15:40, dwight elvey
wrote:
Oh, heck, I'd forgotten about PMOS stuff altogether! :-)
Hmm... PMOS... I know that there are fundamental composition and
voltage differences between NMOS, PMOS, CMOS, HMOS, etc... What makes
it not-compatible with TTL (unlike CMOS, which is easy to interface to
TTL)? >
4008/9? First I've heard of these at all.
These were but interface chips that took the pmos levels and convertered
then to TTL levels to use with standard RAM, ROM, EPROM and I/O.