26 Aug
2014
26 Aug
'14
12:15 p.m.
On 2014-Aug-26, at 11:00 AM, Eric Smith wrote:
On Tue, Aug 26, 2014 at 9:33 AM, drlegendre .
<drlegendre at gmail.com> wrote:
I've been looking at (a bad copy) of the Altair schematics over the course of this
thread.
A few points:
- The front panel data LEDS monitor the DI bus lines (not the DO bus), with no
latches involved.
- The Altair CPU card has 1K pull-ups on the DI bus.
- The Altair front panel does not manipulate memory or the DI or DO bus directly.
Instead, the memory examination facility functions by force-feeding the 8080 JMP
instructions to set the PC address for examine,
and NOP instructions to increment the PC address for examine-next.
It circumvents the DI bus by going directly to a 'sub-bus' around the data pins
of the 8080 to to do this force-feed.
The 8080 then sets the address onto the bus and memory is expected to respond
with data on the DI bus.
- It appears the system worked by leaving MEMR asserted when idle, so an
addressed memory board would be enabled when idle and putting data on the DI bus
to be observed via the LEDs.
Prior to this point in the thread dr indicated he did not have a memory board installed,
hence my question as to whether he now does.
If there is no memory board present, or if the memory board is not responding or
addressed, I (don't see) any reason to expect the data LEDs to be anything other than
ON. There still would be nothing to drive the DI lines low.
If the DI lines are sitting at ~ 1/2 Vcc as dr earlier indicated then I don't see the
termination as being a problem at this point, based on what has been said in the thread so
far.
If all dr has at this time is a 64K mem board(correct me if I'm not recalling that
correctly), then it could be (nearly) time to sort out the bank addressing on that board
(it probably has such) to ensure it will be addressed as the first bank and install it.
It might be preferable, however, to sort out the flakiness which dr referred to and ensure
the rest of the front panel operations are correct first.
Another point to note is the STOP/RUN switch is center-off/momentary-up/momentary-down
(not set-position up/down) controlling a RUN/STOP flip-flop. The reset switch does not
reset the run-stop flip-flop, nor is it reset on power-up, so it appears to be always
necessary to explicitly halt the processor by pressing the RUN/STOP switch to STOP
(momentarily).
Performing front panel memory operations without the processor halted may result in (the
appearance of) flaky behaviour on the LEDs.
Termination has to go. I'll start by
disconnecting the power. But if that
doesn't do it, then it's bye-bye for all of it.
In private email I advised against, but I think it is worth trying
just disconnecting the termination power, and if that isn't enough,
perhaps try disconnecting the termination from just one of the data
lines to see if that results in different behavior for the
corresponding LED.
Maybe someone more familiar with the actual Altair boards can comment
as to whether they have inadequate drivers for bus termination? It
seems unlikely to me since the intended the user to be able to chain a
bunch of their four-slot backplanes and have a fair number of cards,
but it's possible that they cut corners or didn't think it through.