6 Dec
2006
6 Dec
'06
11:38 a.m.
On 6 Dec 2006 at 12:35, Jules Richardson wrote:
True, but then wouldn't you have to buffer the
entire written (computer to
device) and oversampled track of data in memory somewhere rather than spitting
it straight out to the CF card (via suitable serial ==> parallel conversion of
course)?
Oh, absolutely. I was thinking of a RAM track buffer and a counter
that spit out an index pulse every time the counter reset to zero.
It would be simple to also have a second counter to emit sector
pulses to simulate hard disks. Other than the buffer itself, I think
most of the logic (counters, serializer/deserializer, memory
arbitration, etc. could be implemented in a modest CPLD. I suppose
one could mitigate CF write latency with some double-buffering.
Cheers,
Chuck