22 Nov
2006
22 Nov
'06
10:52 a.m.
On Nov 21, 2006, at 6:41 PM, Vincent Slyngstad wrote:
I have some Perl that I wrote which will transform a
netlist of
drawings based on the common DEC Mxxx modules into VHDL (generating
comments for the stuff left out). Basically it has canned VHDL for
various modules that it instantiates based on the connections to
the module.
I'd love to do something big with that.
I used it to do some VHDL for a TC08.
(Unfortunately I can't find a device with enough pins to handle
the result :-).)
I'd solve that problem this way. Take two FPGAs, implement a high-
speed clocked shift register and use them as serializers/
deserializers in each one, with clock, data, and perhaps reset/init
pins going between the two chips. Use this setup to "mirror" a set
of signals in one FPGA into the other. Then you can move some of
your I/O over to the other chip.
-Dave
--
Dave McGuire
Cape Coral, FL