Where are you storing Register A and B? If inside a
controller, then
only that controller has access to them, if you're using ECL latches then
you're going to have to make virtually the entire data path outside the
microcontrollers
DING DING DING!!!!! Give that man a cupie doll!!!
My concept:
______ ___ ______ ___ ______ ___
| u |=| |=| u |=| |=| |=| |=
| - |=| m|=| - |=| m|=| |=| |=
| c |=| e|=| c |=| e|=| |=| |=
| o |=| m|=| o |=| m|=| |=| |=
| n |=| |=| n |=| |=| |=| |=
|______| =|__|=|______|=|__| =|_____ |=|__|=
etc...
Actually, for prototyping wire-wrap is a lot faster to
do, and it'll
clock faster as well. It's much easier to get a good ground plane on a
wire-wrapped board than a double-sided PCB
A little laser-printer transfer plastic and an
exacto-knife.
You do realise that to get anything like the clock rates you want (or
even a tenth of them) you have to treat the tracks as striplines. This
means the width of the PCB track is critical. Toner transfer may not be
good enough.
I know that Track get very touchy at 900Mcyc speeds but, I also knew that
it was near impossible for me to find something like what I wanted at those
speeds.... Plus, Half the fun of building stuff is learning what will and
will not work and then MAKING IT WORK!!! (Pass the hammer please)
As for the
Z-80 vs Alpha features.... I like:
1) I/O ports. I hate the memory map stuff. (yes, I know it is the way
things are done now)
0000H - A100H System
A200H - C200H Video
DA00H - DAFFH IDE HD 1
That sucks (in my opinion). (You like my 16bit addressing? kinda make you
Why? The idea of having one set of instructions to access both memory and
I/O is actually very nice. Of course having an MMU so you can map out the
I/O and have an entire address space of RAM if you want it makes things
even nicer.
Except when it comes to interfacing hardware..... You ask yourself....
Is there a memory chip at this location??? Where was that darned memory
break anyway??? To hell with that... memory in memory locations... I/O
in I/O locations.... otherwise cats and dogs will be mixing and god forbid
that that happen. Seriously, when writing in assembler..... It's nice
to see a I/O op code to help me keep straight that this is an I/O
operation....
Your response:
"But, what if you need to transfer a big block of data like
a NIC? You really need to memory map that."
My answer: "Pretend that the IO addresses are memory. With a 128 bit
address bus, you'll never run out of spaces!"
So what you really want is an I/O page and an addressing mode (a bit like
Direct Page on the 6809) that accesses the I/O ports. And also allows
them to be accessed by normal memory reference instructions.
You know, that is exactly how I see I/O addresses..... That mem/IO pin as
a 17th address bit (except 0000H I/O is not sequentially accessable from
the address registers when you hit the end of your instruction memory)
Note: on the Model II (TRS-80) there was an option to use page the memory
so you could get more than 64K in the thing.... If I remember, it used a
Z-80 I/O address as the pager.
Damnit! I want a 64bit Model II !!!!!!!! (Running and 500Gcyc of-course).
With 8" Laser-Optical drives... and OH OH!!! I want a Thomas-Conrad
100Mbps Fiber ARCnet to connect it to my Linux machines!!!!
Oh.... and a Dodge Viper (just so I'll be secure in my manly-ness).
Arfon
"Programming today is a race between software engineers striving to build
bigger and better idiot-proof programs, and the Universe trying to produce
bigger and better idiots. So far, the Universe is winning." -- Rich Cook