1 Jan
2019
1 Jan
'19
2:40 p.m.
On Jan 1, 2019, at 2:35 PM, Carlo Pisani via cctalk
<cctalk at classiccmp.org> wrote:
Umm. Says who? Intel x86 CPUs makes *heavy* use of microcode. So do a number
of other processors (IBM S/370, et al). The ISAs may be old but I would
argue that in both examples, the underlying designs are *very* modern.
TTFN - Guy
I was never a fan of RISC architecture as does
not fit the standard high
level language model. Everybody wants a 1 pass compiler, thus the RISC
model. If you are doing your own RISC model, you might consider a model
that supports Effective addressing better since we have got the point
where fetching the data is taking longer than processing it.
yup. I am a 68k programmer so I know what you mean.
the 68k is more comfortable to be programmed in assembly, and even the
EA modes (especially in the 68020 and CPU32) help a lot.
unfortunately, the 68K is very complex to be designed, and the first
68020 used microcode, which is a no-go for modern designs.