17 May
2013
17 May
'13
5:43 p.m.
The BGA only packaging of DDR2+ makes the adoption rate low among hobbyists.
You would also have to provide level translation to 1.5 or 1.35V. MCUs
typically don't support those I/O standards.
In DLL off mode, would you still have to provide a time aligned fully
differential DQS and clock? Or can that be run in single ended mode with such a
low clock?
-Alna
On May 17, 2013 at 8:26 PM Randy Dawson <rdawson16 at hotmail.com> wrote:
Has anybody used a DDR3 part in DLL Disable mode?
I'm looking at a Micron MT41J512M4, and the datasheet says that in this mode,
the max. clock period is 7800ns.
(thats 128,205 Hz)
So it looks like you can interface these with microcontroller just fine.
Anybody tried this?
Randy